Chip Designers Rank Memory Among Top Constraints in Small Panel

A small silicon design panel ranked memory nearly alongside advanced packaging as a leading constraint, while Micron’s latest quarter showed DRAM prices rising faster than shipments. Eight participants put memory, including high-bandwidth memory (HBM), at the top of their current constraints, compared with seven who chose advanced packaging. The findings came from a small set of detailed interviews, so they do not establish how widespread either bottleneck is across the chip-design industry. Micron’s fiscal 2026 fourth quarter ended Sept. 3.

Source: TokenPost