Cadence Plans Q4 Early Access for Maestro Chip-Design AI Models

Cadence introduced Maestro on Monday, Oct. 26, a portfolio of specialized AI models for chip and system design agents. The first models are expected to reach select early-access customers in the fourth quarter of 2026. Maestro is a model layer for Cadence’s AI Super Agents, which work with the company’s electronic design automation and system design automation tools. It combines post-trained, domain-specialized language models for chip design with trained decision models and agent skills. The portfolio is designed to work alongside frontier and open-weight models. Cadence lists AuraStack, ChipStack, InnoStack and ViraStack among the agents that can work with Maestro.

Source: TokenPost